Dead End: The Transputer

A Government Buys a Semiconductor Industry

Inmos International plc was founded in July 1978 by Iann Barron, a British computer designer, with the American semiconductor executives Richard Petritz and Paul Schroeder. The initial £50 million came from the National Enterprise Board, the Labour government’s vehicle for state shareholdings in industry, on the argument that Britain needed a domestic chip maker or it would buy all its silicon from California and Japan forever.

The company put its headquarters at Aztec West outside Bristol and built fabrication plants in Colorado Springs and in Newport, South Wales, the latter finished in 1982. Memory paid the bills: Inmos static RAM sold well enough that the company was reported at its peak to hold around 60% of the world SRAM market. The transputer was the reason the company existed, and it took until 1985 to reach production.

By then the politics had changed. The Conservative government sold the state’s 76% stake to Thorn EMI in 1984 for £192 million. Public money into Inmos totalled about £211 million, and the standard verdict is that it never turned a profit; Barron disputes that, putting 1984 revenues at £150 million and the company in the black. SGS-Thomson, later STMicroelectronics, bought Inmos in April 1989, and the name was retired in 1994.

One Chip, One Process

The transputer inverted the usual arrangement. A conventional microprocessor of 1985 was a fast arithmetic unit surrounded by support chips: memory controller, interrupt controller, serial ports, bus logic. A transputer was a modest arithmetic unit that already contained the rest. On one die sat the CPU, a few kilobytes of fast static RAM, a memory interface for external DRAM, a hardware process scheduler, and four bidirectional serial links running at 5 to 20 Mbit/s.

The links are the whole point. Two transputers connect with two wires and no glue logic at all. Sixteen of them wire into a grid; a few hundred wire into a machine. Adding processing power meant adding chips and cable, not redesigning a bus. The instruction set was cut to about sixteen primary instructions, one of the few minimal-instruction-set designs ever sold commercially, on the reasoning that silicon spent on decoding was silicon not spent on links and memory.

The hardware scheduler is the part programmers remember. Process switching was an instruction, not an operating-system service, and it took under a microsecond. A transputer could hold thousands of concurrent processes and multiplex them itself, which meant a program’s process structure could follow the problem rather than the machine. Whether two communicating processes sat on the same chip or on chips at opposite ends of a rack was a detail the source code did not have to know.

Production began in 1985 with the 16-bit T212 and the 32-bit T414. The T800 followed in 1987, adding a 64-bit floating-point unit on the same die, and it is the chip most transputer machines were built from. It cost roughly $400 at launch.

occam

A processor built around message passing needs a language built around message passing. David May, the transputer’s lead architect, designed one, with Tony Hoare consulting for Inmos while developing Communicating Sequential Processes. The language is occam, named after the philosopher William of Ockham, of Occam’s razor, and it is close to a direct implementation of CSP.

Processes communicate over named channels: c ! x sends, c ? y receives, and both sides block until the other is ready. There is no shared mutable state to protect and no lock to forget. Ordering is explicit rather than assumed: SEQ runs its statements one after another, PAR runs them at the same time, and ALT waits on several channels and proceeds with whichever is ready first. Indentation is the block structure. occam 1 appeared in 1983, occam 2 added floating point and functions in 1987, occam 2.1 followed in 1994.

The design has an unusual property for a systems language: a channel is a channel whether it crosses a scheduler or a wire. The same program maps onto one transputer or onto four hundred, with a configuration file deciding which process runs where.

The Machines

Six Inmos employees left in March 1985, impatient at how long the transputer was taking to ship, and founded Meiko Scientific in Bristol to build machines out of it. Their Computing Surface was a rack of transputer boards joined by Meiko’s own link-switching chips, and by 1990 the company had sold more than 300 systems.

The largest was at the University of Edinburgh. A 40-transputer pilot arrived in April 1986; the full Edinburgh Concurrent Supercomputer was commissioned at the end of 1987 with funding from the SERC and the Department of Trade and Industry, and grew to around 400 T800s and 1.6 GB of memory, rated at roughly half a gigaflop. It was a serious machine for the money at a time when that performance otherwise meant a Cray (see The Supercomputer Era). In 1990 the project became the Edinburgh Parallel Computing Centre, which still exists.

Transputers went into the ZEUS detector at DESY in Hamburg, which used more than 300 of them for trigger processing, into radar and image processing, into protocol analysers, and into the Myriade satellite platform. The consumer excursion was Atari’s attempt at a workstation: shown at COMDEX in November 1987 as the Abaq, produced from May 1989 as the Atari Transputer Workstation, one T800-20 with 4 MB of RAM, expandable to thirteen transputers, running the Unix-like HeliOS at $4,000 to $5,000. Atari built 350 of them.

The T9000

The T800’s successor was supposed to make the architecture competitive with everything else in the early 1990s: ten times the performance of the T800, with a cache, a pipeline, and grouped instructions.

It never got there. The delays ran long enough to become a joke inside the parallel-computing community, that the best host architecture for a T9000 was an overhead projector, and by the time it was due the conventional load/store designs were already faster. The silicon that eventually existed managed about 36 MIPS at 50 MHz, far short of the tenfold target and by then unremarkable. Inmos did not have the funding to keep going, and SGS-Thomson, whose interest was embedded systems rather than supercomputers, wound the programme down. Only a handful of systems were ever built. In June 1997 SGS-Thomson formally stopped making the chip and handed its remaining customers to Parsys, a small British parallel-systems firm.

Dead End: Why It Failed

The transputer was not beaten by a better parallel computer. It was beaten by serial computers getting faster.

Inmos bet that per-processor performance would stall and that the only way forward would be to connect many modest processors. Through the whole decade that mattered, the opposite happened: superscalar and RISC designs plus Moore’s Law doubled single-thread performance on a schedule (see RISC vs CISC). A workstation buyer choosing between a transputer array and next year’s single chip could reasonably wait. Each transputer generation had to beat not the previous one but whatever Intel, MIPS and Sun shipped while it was late.

The economics compounded it. Inmos was a mid-sized company funding its own fabs, its own architecture, its own language, its own compilers and its own operating system, against competitors amortising design costs over volumes it could not approach. The T800 at $400 was not cheap enough to make many-chip machines casual purchases, and the software ecosystem was one language most programmers had never seen. Porting existing Fortran or C to occam was work with no payoff on any other machine, which is the standard trap for a novel architecture: the switching cost is paid by the customer and the benefit arrives only if everyone else switches too.

The T9000 then removed the last argument. A four-year slip in the one product that was supposed to restore the performance gap left customers with an architecture whose selling point had expired.

What Survived

The design work did not go in the bin. SGS-Thomson turned the T9000’s core into the ST20, a licensable processor core for systems-on-chip, and put it into chipsets for set-top boxes and GPS receivers. It shipped just over two million units in 1997, against roughly four million PowerPCs the same year. The architecture reached its largest production volumes there, in consumer hardware, rather than in the parallel computers it was designed for.

David May left for the University of Bristol, where he ran the computer science department from 1995 to 2005, and co-founded XMOS in 2005 to build multicore microcontrollers with hardware-scheduled concurrent tasks, which is the transputer argument again at a smaller scale. He was elected to the Royal Society in 1991. Meiko’s interconnect work went to Quadrics in 1996 and became QsNet, used in clusters through the 2000s.

Hoare’s CSP, given a syntax by occam, is the direct ancestor of Go’s goroutines and channels (see Rob Pike: From Unix to Go and Concurrency and Parallelism). And the hardware argument came back on schedule: single-thread performance did stall, around 2005, and the answer was to put many cores on a die and make them talk over an on-chip network. Inmos was right about where computing was going and roughly twenty years early, which in this industry is the same as being wrong (see The UK Computing Industry and Dead End: The Intel iAPX 432 for the same lesson taught in Santa Clara).

📚 Sources

• Inmos — Wikipedia — the July 1978 founding by Barron, Petritz and Schroeder, the £50 million from the National Enterprise Board, Aztec West and the Colorado Springs and Newport plants, the reported 60% share of the world SRAM market, the £192 million Thorn EMI purchase of the government’s 76% stake in 1984, the £211 million total of public money and Barron’s dispute of the never-profitable verdict, the April 1989 SGS-Thomson acquisition and the 1994 retirement of the name
• Transputer — Wikipedia — the on-chip RAM, hardware scheduler and four serial links at 5–20 Mbit/s, the roughly sixteen primary instructions, the T212 and T414 in 1985 and the T800 in 1987 at about $400, the T9000’s tenfold target and its 36 MIPS at 50 MHz, the long delays and the overhead-projector quip, the ST20 core in set-top box and GPS chipsets, and the ZEUS detector and Myriade satellite applications
• Occam (programming language) — Wikipedia — May and Hoare, the CSP basis, the naming after William of Ockham, channels with ! and ?, SEQ/PAR/ALT, and the 1983/1987/1994 versions
• David May (computer scientist) — Wikipedia — lead architect of the transputer and designer of occam, the Hoare collaboration, Bristol 1995–2005, the Royal Society in 1991, and the co-founding of XMOS in 2005
• Meiko Scientific — Wikipedia — the March 1985 founding by six ex-Inmos employees, the Computing Surface, more than 300 systems sold by 1990, and the 1996 transfer of the interconnect work to Quadrics
• Edinburgh Concurrent Supercomputer — Wikipedia — the 40-transputer pilot of April 1986, SERC and DTI funding, commissioning at the end of 1987, roughly 400 floating-point transputers and 1.6 GB of memory at about 0.5 gigaflops, and the 1990 succession by EPCC
• Atari Transputer Workstation — Wikipedia — the November 1987 COMDEX showing as the Abaq, production from May 1989, the T800-20 with 4 MB expandable to thirteen transputers, HeliOS, the $4,000–5,000 price and the 350 units built
• “SGS Thomson Gives Up On T9000” — Tech Monitor, 12 June 1997 — the end of T9000 production and the handover of remaining customers to Parsys
• “STM puts its 32-bit ST20 in top gear” — Electronics Weekly, May 1998 — “ST20 shipped just over two million units last year, while PowerPC was nearer four million” (published 20 May 1998)
• “Revisiting the INMOS Transputer” — RS DesignSpark — retrospective on the architecture, the link model and the reasons the line ended